1. Field of the Invention
The present invention relates to a semiconductor package for protecting a semiconductor chip and a lead frame for the semiconductor package, and more particularly, to a molded leadless package (MLP) and a lead frame for the MLP.
2. Description of the Related Art
A semiconductor package includes a semiconductor chip attached to a lead frame and encapsulated with a molding material. As an operating voltage of a predetermined magnitude is applied to a device within a semiconductor chip, a significant amount of heat is generated in the semiconductor chip. The heat generation problem becomes more severe for power semiconductor chips with high operating voltage. Thus, the ability of a semiconductor package to dissipate heat generated in a semiconductor chip away through an external board can significantly affect its stability and reliability. Recently, MLPs designed to allow heat to efficiently escape from the semiconductor chip and with a reduced area have been used in a wide variety of applications.
For example, as discussed in U.S. Pat. No. 6,437,429 titled “SEMICONDUCTOR PACKAGE WITH METAL PADS” for which application was filed by Chun-Jen Su, et al., on May 11, 2001, a semiconductor chip is fixed onto a die pad and a metal pad is formed on a downside surface of a lead. A gap is formed between the metal pad and the cutting surface of the lead using a half-etching method and filled with a molding material during the manufacture of a semiconductor package. This reduces the thickness of the cutting surface of the lead while preventing formation of a cutting sharp edge at the brim of metal pads.
However, as the speed and integration density of a semiconductor chip increase, the number of bonding pads on the semiconductor chip for connecting the semiconductor chip with external device increases. This results in an increase in the number of leads in a semiconductor package corresponding to the bonding pads. This increase in turn increases the size of the semiconductor package because it is difficult to increase the number of leads in a semiconductor package with a predetermined size and predefined minimum lead pitch.
Further, the size of a semiconductor chip and a semiconductor package is decreasing as the demands for smaller electronic devices using semiconductor chips increase. Thus, increasing the size of a semiconductor package in order to increase the number of leads results in failure to properly mount a high-integrated, small-sized semiconductor chip on a lead. Even when the semiconductor chip is mounted on the half-etched thin lead, the lead or the semiconductor chip may be damaged due to bouncing during wire bonding between the semiconductor chip and the lead.
Furthermore, when a conventional MLP is mounted onto a board using solder, a solder bond may be formed only at an edge of the semiconductor package, thus reducing a package to board attachment reliability. When the conventional MLP is attached onto a board having a via hole, air trap may occur within the via hole.